1. Field of the Invention
The present invention relates to a microprocessor for use in an in-circuit emulator, and more specifically to a circuit, incorporated in such a microprocessor, for discriminating a user address space and an in-circuit emulator address space. In this specification, the in-circuit emulator will be often abbreviated to "ICE".
2. Description of Related Art
In the prior art, small-sized microprocessors for use in an in-circuit emulator have been used in such a manner that an address space of the smaller address sized microprocessor is divided into a plurality of small spaces, and an internal memory corresponding to the smaller address spaces are previously set with desired values, so that at each time anyone of the smaller address spaces is accessed, a corresponding one of the previously set desired values can be obtained at an external terminal. In addition, a status bit for distinguishing between a user address space and an ICE space (in-circuit emulator address space) is previously set in the internal memory, and an integrated circuit for the small-sized microprocessor discriminates between the user space and the ICE address space for each of the smaller address spaces as mentioned above.
On the other hand, middle-sized or large-sized microprocessors have neither an internal memory corresponding to the smaller address spaces in the small-sized microprocessors, nor an external terminal for outputting information about the smaller address spaces. Alternatively, equivalent functions or means have been realized by circuits external to the middle/large-sized microprocessors.
In addition to the equivalent means realized in the middle/large-sized microprocessors, an address space discriminating means for discriminating between the user address space and the ICE address space has been required. This address space discriminating means is realized by pairing two consecutive bus cycles in an ICE mode in which an ICE monitor program normally runs, and by using a first bus cycle of the bus cycle pair for discriminating whether a second bus cycle (a bus cycle immediately after the first bus cycle) for read/write access to an I/O (input/output) device or memory external to the microprocessor is an access to the user address space. If a second bus cycle is the user address space access, the space discriminating means triggers an ICE address space access bus cycle indicating that one immediate-after bus cycle for read/write access to the I/O device or memory external to the microprocessor is the access to the user address space. In addition, the space discriminating means includes a circuit, external to the microprocessor, for changing the access of the above mentioned immediate-after bus cycle instructed in the ICE monitor program to the user address space access.
In the above mentioned small-sized microprocessor, however, a part of a full address space is mapped to an ICE address space in the ICE mode. Therefore, if the part of the address space mapped to the ICE address space is overlapped with an address of the user address space desired to be accessed in the ICE mode, it is necessary to re-map the ICE address space, and therefore, the ICE monitor program inevitably becomes complicated. In addition, performance of the ICE function is lowered by intervention of a processing for detecting address overlapping.
In the middle/large-sized microprocessors, the processing for detecting address overlapping has been also required, and in addition, even if the external circuit is used, it becomes high in cost to divide a full address space of the middle/large-sized microprocessors into smaller address spaces and to discriminate a desired number of smaller address spaces.
Furthermore, the external circuit increases a delay time of various control signals inputted to and outputted from an ICE probe for the middle/large-sized microprocessors, with the result that a user hardware sustains restrictions, and the ICE often becomes unusable.
In this connection, if there is provided the means for indicating in the ICE mode that the immediately succeeding ICE address space access is the user address space access, it has become unnecessary to re-map the ICE address space. However, a substantial time has been required for access to the user address space, and in addition, an external hardware has been needed, similarly to the above case. Therefore, various control signals inputted to and outputted from an ICE probe for the middle/large-sized microprocessors, have an increased delay time.